Semiconductor device and fabrication method for the same

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United States of America Patent

PATENT NO 9287392
SERIAL NO

13687407

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Abstract

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The semiconductor device includes: a transistor having a gate electrode formed on a semiconductor substrate and first and second source/drain regions formed in portions of the semiconductor substrate on both sides of the gate electrode; a gate interconnect formed at a position opposite to the gate electrode with respect to the first source/drain region; and a first silicon-germanium layer formed on the first source/drain region to protrude above the top surface of the semiconductor substrate. The gate interconnect and the first source/drain region are connected via a local interconnect structure that includes the first silicon-germanium layer.

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Patent Owner(s)

Patent OwnerAddress
PANNOVA SEMIC LLC3945 FREEDOM CIRCLE SUITE 900 SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ogawa, Hisashi Toyama, JP 128 1259
Oosuka, Tsutomu Toyama, JP 9 59
Sato, Yoshihiro Toyama, JP 268 1656

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