Non-volatile memory with a single gate-source common terminal and operation method thereof
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United States of America Patent
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Mar 8, 2016
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Jan 14, 2016
app pub date -
Jul 8, 2014
filing date -
Jul 8, 2014
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Abstract
A non-volatile memory with a single gate-source common terminal and an operation method thereof are provided. The non-volatile memory includes a transistor and a capacitor structure both embedded in a semiconductor substrate. The transistor includes a first dielectric layer, a first electric-conduction gate and several first ion-doped regions. The capacitor structure includes a second dielectric layer, a second electric-conduction gate and a second ion-doped region. The memory may further include a third ion-doped region below the second dielectric layer. The first and second electric-conduction gates are electrically connected to form a single floating gate of the memory cell. The source and second ion-doped region are electrically connected to form a single gate-source common terminal.
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