Compiler-controlled region scheduling for SIMD execution of threads

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United States of America

PATENT NO 9274792
SERIAL NO

13710279

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Abstract

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A compiler-controlled technique for scheduling threads to execute different regions of a program. A compiler analyzes program code to determine a control flow graph for the program code. The control flow graph contains regions and directed edges between regions. The regions have associated execution priorities. The directed edges indicate the direction of program control flow. Each region has a thread frontier which contains one or more regions. The compiler inserts one or more update predicate mask variable instructions at the end of a region. The compiler also inserts one or more conditional branch instructions at the end of the region. The conditional branch instructions are arranged in order of execution priority of the regions in the thread frontier of the region, to enforce execution priority of the regions at runtime.

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Patent Owner(s)

  • NVIDIA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Diamos, Gregory San Jose, US 15 334
Mehrara, Mojtaba San Francisco, US 6 98

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