Calibration of time-interleaved analog-to-digital converter
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United States of America Patent
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Feb 16, 2016
Grant Date -
Nov 12, 2015
app pub date -
May 29, 2014
filing date -
May 8, 2014
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Abstract
Various embodiments describe systems and methods for calibrating gain mismatches and timing errors in and between individual ADC channels of a time-interleaved ADC. In some embodiments, a calibration signal (e.g., a DC signal) can be selectively applied to each ADC channel of a time-interleaved ADC to estimate a gain mismatch of the corresponding ADC channel. The gain mismatch can then be compensated by a gain correction circuit at the digital backend of the time-interleaved ADC. In some embodiments, timing errors between ADC channels of a time-interleaved ADC can be measured by applying a time varying signal to the ADC channels of the time-interleaved ADC. The timing errors can be calibrated by applying a feedback signal to a clock phase generator of the time-interleaved ADC.
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