Data processor chip with flexible bus system

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United States of America Patent

PATENT NO 9256575
SERIAL NO

14718516

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Abstract

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A data processor chip having a two-dimensional array of arithmetic logic units and memory where the arithmetic logic units are in communication with memory units in one dimension and with other arithmetic units in a second.

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Patent Owner(s)

Patent OwnerAddress
SCIENTIA SOL MENTIS AGNEUHOFSTRASSE 1 SCHINDELLEGI 8834

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baumgarte, Volker Munich, DE 33 912
Ehlers, Gerd Grasbrunn, DE 14 172
Lier, Frank Munich, DE 7 104
May, Frank Munich, DE 51 1707
Nückel, Armin Neupotz, DE 18 248
Oertel, Jens Bad Bergazabern, DE 9 113
Rao, Prashant Munich, DE 38 358
Reichardt, Dirk Munich, DE 7 104
Vorbach, Martin Lingenfeld, DE 174 5665

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