Multiple level cell memory device with single bit per cell, re-mappable memory block
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United States of America Patent
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Dec 1, 2015
Grant Date -
Apr 24, 2014
app pub date -
Dec 24, 2013
filing date -
Jun 25, 2004
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Abstract
A system having a non-volatile memory device has a plurality of memory cells that are organized into memory blocks. Blocks can operate in either a multiple bit per cell mode or a single bit per cell mode. A processor controls the system and selects blocks to operate in the multiple bit per cell mode and single bit per cell mode. One dedicated memory block is capable of operating only in the single bit per cell mode. If the dedicated memory block is found to be defective, a defect-free block can be remapped to that dedicated memory block location to act only in the single bit per cell mode.
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