Erasing physical memory blocks of non-volatile memory

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United States of America Patent

PATENT NO 9196368
APP PUB NO 20140133226A1
SERIAL NO

14159041

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Abstract

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Apparatus and methods are disclosed, such as those that provide dynamic block allocations in NAND flash memory between single-level cells (SLC) and multi-level cells (MLC) based on characteristics. In one embodiment, a memory controller dynamically switches between programming and/or reprogramming blocks between SLC mode and MLC mode based on the amount of memory available for use. When memory usage is low, SLC mode is used. When memory usage is high, MLC mode is used. Dynamic block allocation allows a memory controller to obtain the performance and reliability benefits of SLC mode while retaining the space saving benefits of MLC mode.

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Patent Owner(s)

Patent OwnerAddress
ROUND ROCK RESEARCH LLC26 DEER CREEK LANE MT KISCO NY 10549

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
De, Santis Luca Avezzano, IT 87 585
Marotta, Giulio Contigliano, IT 25 573
Vali, Tommaso Sezze, IT 149 2038

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