HIGH-VOLTAGE LEVEL CONVERSION CIRCUIT
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 17, 2015
Grant Date -
Nov 26, 2015
app pub date -
Aug 21, 2014
filing date -
May 21, 2014
priority date (Note) -
Granted
status (Latency Note)
Importance
Abstract
The present disclosure provides a high-voltage level conversion circuit at least comprising a first NMOS transistor, a first PMOS transistor, a second NMOS transistor, a second PMOS transistor, a third PMOS transistor, a third NMOS transistor, a fourth PMOS transistor and a fourth NMOS transistor for receiving an input signal have a first voltage level and a second voltage level and converting the input signal to an output signal having a third voltage level and a fourth voltage level. Compared to conventional high-voltage level conversion circuits the provided high-voltage level conversion circuit occupies less circuit area.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully