Trench MOS device having a termination structure with multiple field-relaxation trenches for high voltage applications
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United States of America Patent
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Nov 3, 2015
Grant Date -
Jul 16, 2015
app pub date -
Jan 10, 2014
filing date -
Jan 10, 2014
priority date (Note) -
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Abstract
A termination structure for a semiconductor device includes a semiconductor substrate having an active region and a termination region. Two or more trench cells are located in the termination region and extend from a boundary of the active region toward an edge of the semiconductor substrate. A termination trench is formed in the termination region on a side of the trench cells remote from the active region. A conductive spacer is located adjacent to a sidewall of the termination trench nearest the trench cells. A first oxide layer is formed in the termination trench and contacts a sidewall of the conductive spacer. A first conductive layer is formed on a backside surface of the semiconductor substrate. A second conductive layer is formed atop the active region and the termination region.
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