Semiconductor device having a trench gate structure and manufacturing method of the same

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United States of America Patent

PATENT NO 9171906
APP PUB NO 20140246718A1
SERIAL NO

14278430

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Abstract

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In a manufacturing method of a semiconductor device, a trench is defined in a semiconductor substrate, and an adjuster layer having a first conductivity type impurity concentration higher than a drift layer is formed at a portion of the semiconductor substrate adjacent to a bottom wall of the trench. A channel layer is formed by introducing second conductivity type impurities to a portion of the semiconductor substrate adjacent to a sidewall of the trench and between the adjustment layer and a main surface of the semiconductor substrate while restricting the channel layer from extending in a depth direction of the trench by the adjustment layer.

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Patent Owner(s)

Patent OwnerAddress
DENSO CORPORATIONKARIYA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Oosawa, Seigo Nukata-gun, JP 8 59
Taketani, Eiichi Nukata-gun, JP 4 29

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