Quad flat non-leaded semiconductor package and fabrication method thereof

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United States of America Patent

PATENT NO 9171740
SERIAL NO

13095843

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Abstract

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A method for fabricating a quad flat non-leaded (QFN) package includes: forming die pads and bump solder pads by pressing a metal plate, wherein each of the die pads and the bump solder pads has at least a cross-sectional area greater than another located underneath along its thickness dimension, thereby enabling the die pads and the solder pads to be securely embedded in an encapsulant. The method further includes removing the metal plate after forming the encapsulant so as to prevent the encapsulant from overflowing onto the bottom surfaces of the bump solder pads.

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Patent Owner(s)

Patent OwnerAddress
APTOS TECHNOLOGY INCNO 65 KUANG-FU NORTH RD HSIN-CHU INDUSTRIAL PARK HU-KOU HSIN-CHU 303 303

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jow, En-min Hsinchu, TW 34 239

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