Digital signal processor having instruction set with a logarithm function using reduced look-up table
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United States of America Patent
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Oct 27, 2015
Grant Date -
Aug 5, 2010
app pub date -
Jan 30, 2009
filing date -
Jan 30, 2009
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Abstract
A digital signal processor is provided having an instruction set with a logarithm function that uses a reduced look-up table. The disclosed digital signal processor evaluates a logarithm function for an input value, x, by decomposing the input value, x, to a first part, N, a second part, q, and a remaining part, r, wherein the first part, N, is identified by a position of a most significant bit of the input value, x, and the second part, q, is comprised of a number of bits following the most significant bit, wherein the number is small relative to a number of bits in the input value, x; obtaining a value
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