2D/3D analysis for abnormal tools and stages diagnosis
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United States of America Patent
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Oct 13, 2015
Grant Date -
Apr 10, 2014
app pub date -
Oct 9, 2012
filing date -
Oct 9, 2012
priority date (Note) -
In Force
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Abstract
A method for analyzing abnormalities in a semiconductor processing system provides performing an analysis of variance on a production history associated with each of a plurality of tools at each of a plurality of process steps for each of a plurality of processed wafers, and key process steps are identified. A regression analysis on a plurality of measurements of the plurality of wafers at each process step is performed and key measurement parameters are identified. An analysis of covariance on the key measurement parameters and key process steps, and the key process steps are ranked based on an f-ratio, therein ranking an abnormality of the key process steps. Further, the plurality of tools associated with each of the key process steps are ranked based on an orthogonal t-ratio associated with an analysis of covariance, therein ranking an abnormality each tool associated with the key process steps.

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- 15 United States
- 10 France
- 8 Japan
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- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD | 8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78 |
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- [Patents Count]
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Chao, Hui-Yun | Zhubei, TW | 9 | 60 |
Chen, Jui-Long | Taichung, TW | 12 | 72 |
Lin, Chin-Hsiang | Hsinchu, TW | 424 | 6439 |
Lin, Chun-Hsien | Hsinchu, TW | 286 | 2079 |
Mou, Jong-I | Hsinpu Township, TW | 55 | 447 |
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