Substrate bias control circuit
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United States of America Patent
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Oct 13, 2015
Grant Date -
Jan 16, 2014
app pub date -
Sep 12, 2013
filing date -
Oct 22, 2009
priority date (Note) -
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Abstract
An integrated circuit includes a process voltage temperature (PVT) effect transducer responsive to a PVT effect, a PVT effect quantifier coupled to the PVT effect transducer and configured to quantify the PVT effect to provide an output, and a bias controller configured to receive the output of the PVT effect quantifier and provide a bias voltage for a substrate of an NMOS or a PMOS transistor. The bias controller is configured to compare the output received from the PVT effect quantifier to a threshold value, and decrease or increase the bias voltage depending on whether the output is higher or lower than the threshold value.
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