Silicon-controlled rectification device with high efficiency
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United States of America Patent
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Oct 6, 2015
Grant Date -
Jul 9, 2015
app pub date -
Mar 19, 2015
filing date -
Aug 6, 2013
priority date (Note) -
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Abstract
A silicon-controlled rectification device with high efficiency is disclosed, which comprises a P-type region surrounding an N-type region. A first P-type heavily doped area is arranged in the N-type region and connected with a high-voltage terminal. A plurality of second N-type heavily doped areas is arranged in the N-type region. A plurality of second P-type heavily doped areas is closer to the second N-type heavily doped areas than the first N-type heavily doped area and arranged in the P-type region. At least one third N-type heavily doped area is arranged in the P-type region and connected with a low-voltage terminal. Alternatively or in combination, the second N-type heavily doped areas and the second P-type heavily doped areas are respectively arranged in the P-type region and the N-type region.
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