Semiconductor device and method for evaluating semiconductor device

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United States of America Patent

PATENT NO 9153649
APP PUB NO 20140152336A1
SERIAL NO

14091907

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Abstract

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A semiconductor layer with a low density of trap states is provided. A transistor with stable electrical characteristics is provided. A transistor having high field-effect mobility is provided. A semiconductor device including the transistor is provided. A method for evaluating a semiconductor layer is provided. A method for evaluating a transistor is provided. A method for evaluating a semiconductor device is provided. Provided is, for example, a semiconductor layer with a low defect density which can be used for a channel formation region of a transistor, a transistor including a semiconductor layer with a low defect density in a channel formation region, or a semiconductor device including the transistor.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO INC398 HASE ATSUGI-SHI KANAGAWA-KEN 243-0036

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hosaka, Yasuharu Tochigi, JP 109 1101
Kanemura, Hiroshi Tochigi, JP 12 169
Obonai, Toshimitsu Tochigi, JP 48 293
Sasaki, Toshinari Tokyo, JP 305 5635
Yokoyama, Shuhei Shizuoka, JP 99 548

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