Counter apparatus
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United States of America Patent
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Oct 6, 2015
Grant Date -
May 1, 2014
app pub date -
Oct 30, 2013
filing date -
Nov 1, 2012
priority date (Note) -
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Abstract
Of a counter apparatus, a first microcomputer and a second microcomputer communicate with each other and receive a crank signal with pulses. The first microcomputer detects a first pulse count number at a detection time point and transmits it to the second microcomputer. The second microcomputer detects a second pulse count number at a determination time point, which is an allowable delay time period later from the detection time point. The allowable delay time period is expected to elapse from the detection time point to when the first pulse count number is received by the second microcomputer. The second pulse count number is compared with a determination value, which is the sum of (i) the first pulse count number and (ii) the largest integer not greater than the quotient of T2/T1, T1 being a pulse period of the crank signal, T2 being the allowable delay time period.
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