Circuit arrangement, a method for testing a supply voltage provided to a test circuit, and a method for repairing a voltage source

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United States of America Patent

PATENT NO 9147498
APP PUB NO 20140307515A1
SERIAL NO

13862513

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A circuit arrangement may include: a memory, composed of a memory cell array, including a plurality of memory cells, and a peripheral circuitry; a voltage source configured to provide at least one supply voltage; a test circuit integrated with the memory cell array and the voltage source, wherein the test circuit receives the supply voltage; the test circuit including: at least one test memory cell; at least one failure detection circuit configured to detect a data retention failure in the at least one test memory cell.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Badereddine, Nabil Grasse, FR 4 17
Bonet, Zordan Leonardo Henrique Montpellier, FR 1 2
Bosio, Alberto Montpellier, FR 5 20
Girard, Patrick Villetelle, FR 11 156

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