Field-programmable gate array
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United States of America Patent
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Sep 22, 2015
Grant Date -
Oct 2, 2014
app pub date -
Nov 2, 2012
filing date -
Nov 4, 2011
priority date (Note) -
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Abstract
An FPGA has a number of CLBs, each CLB having a number of CABs (10, 110, 210, 310, 410). Each CAB (10, 110, 210, 310, 410) comprises: a number of configurable transistors (20, 120, 220, 320, 420) each comprising one or more useable transistors M and a number of switching transistors; and, configuration circuitry comprising a number of switching transistors. The ratio of switching transistors to useable transistors for each CAB is less than 26:1. A method of configuring such an FPGA comprises optimizing each configurable transistor.
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