Transceiver system having phase and frequency detector and method thereof
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United States of America Patent
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Sep 8, 2015
Grant Date -
Feb 6, 2014
app pub date -
Oct 16, 2013
filing date -
Aug 24, 2010
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Abstract
A transceiver system having a phase and frequency locked architecture is described. The transceiver system includes a clock and data recovery type receiver, a frequency divider and a transmitter. The clock and data recovery type receiver receives an external signal from a host unit and extracts the external signal to generate a clock signal and a data signal. The frequency divider is used to divide the frequency of the clock signal for generating a reference clock signal. The transmitter transmits output data content based on the reference clock signal.
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