Link equalization mechanism
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United States of America Patent
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Sep 1, 2015
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N/A
app pub date -
Sep 24, 2014
filing date -
Sep 24, 2014
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Abstract
Techniques for embedded high speed serial interface methods are described herein. The techniques provide an apparatus for link equalization including an equalization control module to determine at least a first coefficient setting and a second coefficient setting at a remote transmitter based on an algorithm. The apparatus also includes a receiver margining module to determine a first margin value to be associated with the first coefficient setting and a second margin value to be associated with the second coefficient setting. The receiver margining module is to further determine if at least the first margin value is higher than the second margin value.
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