Directional coupler integrated by CMOS process
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United States of America Patent
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-
Sep 1, 2015
Grant Date -
Jun 6, 2013
app pub date -
Apr 16, 2012
filing date -
Dec 5, 2011
priority date (Note) -
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Abstract
A directional coupler is disclosed integrated on a single chip and an integrated circuit based on a standard CMOS process and relates to a field of radio frequency communication. In exemplary implementations, by using a standard CMOS process technology, the directional coupler integrated by a CMOS process is formed by a coil wound by a upper layer of metal lines, a coil wound by a lower layer of metal lines, two tuning capacitor array, and a matching resistor. Two terminals of the coil are a direct terminal and an input terminal; two terminals of the coil are a coupled terminal and an isolation terminal; the terminals of the coils and are intersected at 90°; the coil is wound by an upper metal layer and the coil is wound by a lower metal layer. Further, the insertion loss is low and the isolation degree is large.

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- 15 United States
- 10 France
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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
PEKING UNIVERSITY | 100871 NO 5 THE SUMMER PALACE ROAD BEIJING HAIDIAN DISTRICT BEIJING CITY BEIJING CITY 100871 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Huang, Ru | Beijing, CN | 100 | 354 |
Liao, Huailin | Beijing, CN | 1 | 3 |
Wang, Jiayi | Beijing, CN | 4 | 5 |
Ye, Le | Beijing, CN | 11 | 3 |
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