Non-volatile 3D memory with cell-selectable word line decoding
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United States of America Patent
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Sep 1, 2015
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app pub date -
Mar 28, 2014
filing date -
Mar 28, 2014
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Abstract
A three-dimensional array of memory elements is formed across multiple layers of planes positioned at different distances above a semiconductor substrate. The memory elements are each accessible by a word line in a plane and a local bit line. The three-dimensional array includes a two-dimensional array of pillar lines through the multiple layers of planes. The pillar lines are of a first type that act as local bit lines and a second type that provide access to the word lines by having respective memory elements preset to a permanently low resistance state for connecting second-type pillar lines for exclusive access to respective word lines. An array of metal lines on the substrate is switchably connected to the vertical bit lines to provide access to the local bit lines and the word lines.
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