External settings that reconfigure the error handling behavior of a distributed PCIe switch

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United States of America Patent

PATENT NO 9122604
APP PUB NO 20130339825A1
SERIAL NO

13775481

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Abstract

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Method for performing an operation to maintain data integrity in a parallel computing system, the operation comprising providing a lookup table specifying a plurality of predefined destinations for data packets, receiving a first data packet comprising a destination address specifying a first destination, wherein the first data packet has an error of a first type, identifying, from the lookup table, an entry specifying a second destination for data packets having errors of the first type, and sending the first data packet to the second destination.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Freking, Ronald E Rochester, US 19 304
McGlone, Elizabeth A Rochester, US 51 547
Tram, Nicholas V Rochester, US 2 9
Wollbrink, Curtis C Rochester, US 28 361

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