Data pattern generation for I/O training and characterization

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United States of America Patent

PATENT NO 9122570
APP PUB NO 20150067197A1
SERIAL NO

14017277

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Abstract

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A memory structure that can perform characterization of output data paths without accessing the main memory array includes: a plurality of output data paths; a plurality of registers coupled to the output data paths. The registers include: at least a first pattern register and a second pattern register, for respectively storing a first data pattern and a second data pattern; and at least a first mapping register, for storing a plurality of binary values, wherein each binary value indicates whether the first data pattern or the second data pattern should be mapped to a corresponding output data path.

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Patent Owner(s)

Patent OwnerAddress
NANYA TECHNOLOGY CORPHWA-YA TECHNOLOGY PARK 669 FUHSING 3 RD KUEISHAN TAO-YUAN HSIEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hollis, Timothy M Meridian, US 159 1841
Kim, Kang-Yong Boise, US 136 518
Stave, Eric J Meridian, US 50 221
Wright, Jeffrey P Boise, US 136 2852

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