Memory devices having special mode access
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United States of America Patent
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Sep 1, 2015
Grant Date -
Jul 31, 2014
app pub date -
Mar 31, 2014
filing date -
Oct 17, 2007
priority date (Note) -
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Abstract
A memory device includes a memory array, a special mode enable register, and a controller. When the controller receives a register write command to write first data into the special mode enable register and the memory device does so, the memory device operates in a first mode. When the controller receives a register write command to write second data into the special mode enable register and the memory device does so, the memory device operates in a second mode.
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