Reconfigurable circuit block supporting different interconnection configurations for rate-conversion circuit and processing circuit and related method thereof
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United States of America Patent
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Aug 25, 2015
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N/A
app pub date -
May 18, 2014
filing date -
May 21, 2013
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Abstract
A reconfigurable circuit block includes a rate-conversion circuit, a processing circuit, a first asynchronous interface circuit, and a second asynchronous interface circuit. The rate-conversion circuit converts a first input signal into a first output signal. The processing circuit processes a second input signal to generate a second output signal. The first asynchronous interface circuit outputs a third output signal asynchronous with the first output signal. The second asynchronous interface circuit outputs a fourth output signal asynchronous with the second output signal. The controllable interconnection circuit transmits the third output signal to the processing circuit to serve as the second input signal when controlled to have a first interconnection configuration, and transmits the fourth output signal to the rate-conversion circuit to serve as the first input signal when controlled to have a second interconnection configuration.
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International Classification(s)
- H03K:PULSE TECHNIQUE
- H04L:TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAP....
- H03M:CODING, DECODING OR CODE CONVERSION, IN GENERAL
- H04B:TRANSMISSION
- G06F:ELECTRIC DIGITAL DATA PROCESSING
- H03F:AMPLIFIERS
- H04W:WIRELESS COMMUNICATION NETWORKS
- G01R:MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC V....
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