Nitride semiconductor substrate
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United States of America Patent
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Aug 25, 2015
Grant Date -
Nov 20, 2014
app pub date -
May 7, 2014
filing date -
May 14, 2013
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Abstract
A nitride semiconductor substrate suitable for a high withstand voltage power device is provided in which current collapse is controlled, while reducing leakage current. In a nitride semiconductor substrate, wherein a buffer layer, an active layer, and an electron supply layer, each comprising a group 13 nitride, are stacked one by one on a silicon single crystal substrate, the buffer layer has a structure where a multilayer stack in which a pair of nitride layers having different concentrations of Al or Ga are repeatedly deposited a plurality of times on an initial layer of AlxGa1−xN (0≦x≦1) is stacked, and includes a doping layer whose carbon concentration is 1×1018 to 1×1021 cm−3 and whose Si concentration is 1×1017 to 1×1020 cm−3, a thickness of the doping layer is 15% or more of the total thickness of the buffer layer.
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