Horizontally and vertically aligned graphite nanofibers thermal interface material for use in chip stacks
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United States of America Patent
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Aug 18, 2015
Grant Date -
Mar 13, 2014
app pub date -
Sep 13, 2012
filing date -
Sep 13, 2012
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Abstract
The chip stack of semiconductor chips with enhanced cooling apparatus includes a first chip with circuitry on a first side and a second chip electrically and mechanically coupled to the first chip by a grid of connectors. The apparatus further includes a thermal interface material pad placed between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip.
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