Clock and data recovery tolerating long consecutive identical digits

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9100024
APP PUB NO 20140301515A1
SERIAL NO

14247095

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Abstract

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A high performance CDR circuit. The circuit includes a first and second sampler, a first and second charge-pump coupled to the first and the second sampler, a capacitor coupled to the first charge pump, and a filter coupled to the second charge pump. A VCO circuit is coupled to the first charge pump and the second charge pump, wherein a path for setting a frequency is provided by the first charge pump and the capacitor, and wherein a path for phase is provided by the second charge pump, wherein a voltage of the capacitor is stable to enable the VCO to tolerate CIDs.

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Patent Owner(s)

Patent OwnerAddress
PICO SEMICONDUCTOR INC2400 CRISTO REY PLACE LOS ALTOS CA 94024

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iravani, Kamran Los Altos, US 14 126

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