Charge ordered vertical transistors
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United States of America Patent
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Aug 4, 2015
Grant Date -
Jan 1, 2015
app pub date -
Feb 15, 2013
filing date -
Feb 15, 2012
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Abstract
A vertical charge ordered transistor is disclosed. A thin charge ordered layer is employed as a tunnel barrier between two electrodes. A gate-induced accumulation of charge destabilizes the charge ordered state around the circumference of the device, opening up a parallel ohmic conduction channel, which leads to an exponential increase in source-drain current. VCOT devices have the potential to exhibit very large on/off ratios, low off-state currents, and sub-threshold slopes below 60 mV/dec.
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