Method for reducing non-linearity during measurement of a physical parameter and electronic circuit for implementing the same
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United States of America Patent
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Aug 4, 2015
Grant Date -
Jan 3, 2013
app pub date -
Jun 27, 2012
filing date -
Jul 1, 2011
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Abstract
A method for reducing the non-linearity effect of a digital-analog converter on an electronic interface circuit of a capacitive sensor. The electronic circuit includes an amplifier connected to the common electrode by a switching unit, a logic unit connected to the amplifier for supplying first and second digital measuring signals, and a digital-analog converter for supplying a measuring voltage to the electrodes. The method includes firstly biasing the capacitor electrodes by the measuring voltage, then biasing the fixed electrode of the first capacitor at a regulated voltage and the fixed electrode of the second capacitor at a low voltage, then biasing the capacitor electrodes by the measuring voltage, and finally biasing the fixed electrode of the first capacitor at a low voltage and the fixed electrode of the second capacitor at a regulated voltage.
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