Frequency locking system
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United States of America Patent
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Jul 14, 2015
Grant Date -
Jan 29, 2015
app pub date -
Oct 15, 2014
filing date -
Apr 18, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
A frequency locking system for locking a clock frequency in a CDR circuit without crystal oscillator is provided. Reference data information is inputted into a first low-pass filter; the first low-pass filter is connected to a first swing detector; the first swing detector is connected to a non-inverting terminal of a comparator; an output terminal of the comparator is connected to a charge pump; the charge pump is connected to a first terminal of a capacitor; the capacitor is grounded. The capacitor is also connected to a voltage-controlled oscillator; the voltage-controlled oscillator is connected to a code pattern conversion generator; the code pattern conversion generator is connected to of a second low-pass filter; the second low-pass filter is connected to an input terminal of a second swing detector; an output terminal of the second swing detector is connected to an inverting terminal of the comparator.
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