Control circuit for a buck power factor correction stage
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United States of America Patent
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Jun 16, 2015
Grant Date -
Jan 7, 2010
app pub date -
Jul 1, 2008
filing date -
Jul 1, 2008
priority date (Note) -
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Abstract
This invention relates to a control circuit for a buck power factor correction (PFC) stage. Buck PFC stages are commonly used in low cost, high efficiency power converters. These buck PFC stages are typically controlled using a very slow control loop with a crossover frequency of the order of 10 to 20 Hz. However, such a slow response is unsuitable for applications requiring overvoltage protection. The present invention overcomes the problems with the known control circuits for buck PFC stages by implementing a two stage control circuit having a fast outer loop control circuit and a slow inner loop control circuit. The fast outer loop control circuit is in operation during low load conditions and the slow inner loop control circuit is only active under load.
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