Current compensation circuit
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United States of America Patent
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Jun 9, 2015
Grant Date -
Sep 25, 2014
app pub date -
Mar 12, 2014
filing date -
Mar 21, 2013
priority date (Note) -
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Abstract
A first circuit operates in synchronization with a first clock having a first frequency, and generates N parallel data sets for every cycle period of the first clock. An interface circuit time-division multiplexes the N data sets received from the first circuit. A second circuit processes the N data set thus time-division multiplexed, in synchronization with a second clock having a second frequency which is N times the first frequency. A judgment unit judges whether or not the N data sets are effective data which instructs a flip-flop group, configured as a state holding element included in the second circuit, to generate an effective state transition. In a cycle period in which the N data sets are ineffective, a data replacement unit replaces at least a part of the N data sets with current compensation data DCMP.
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