Integrated micro-plasma limiter
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United States of America Patent
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Jun 9, 2015
Grant Date -
Dec 5, 2013
app pub date -
Apr 18, 2013
filing date -
May 31, 2012
priority date (Note) -
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Abstract
A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The plasma limiter includes a signal substrate and a trigger substrate defining a hermetically sealed cavity therebetween in which is encapsulated an ionizable gas. The signal substrate includes a signal line within the cavity and the trigger substrate includes at least one trigger probe extending from the trigger substrate towards the transmission line. If a signal propagating on the transmission line exceeds a power threshold, the gas within the cavity is ionized creating a conduction path between the transmission line and the trigger probe that draws off the high power current.
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