Independently timed multiplier
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United States of America Patent
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Jun 2, 2015
Grant Date -
Jan 31, 2013
app pub date -
Jul 27, 2012
filing date -
Jul 27, 2011
priority date (Note) -
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Abstract
An independently timed multiplier unit includes a multiplier and a clock generator. The multiplier has a first set of semiconductor circuits in a critical path. The clock generator has a second set of semiconductor circuits configured to control a clock period of said clock generator selected to set a clock period longer than the propagation delay through the critical path of the multiplier. The clock generator may include a delay circuit having a delay to set the clock period longer than the propagation delay through the critical path of said multiplier. The clock generator uses circuit with identical logical design including the same standard cells, the same logic design or the same floor plan. Close matching of these circuit causes the multiplier and the clock generator to experience the same PVT speed variations.
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