Semiconductor wafer and method for auto-calibrating integrated circuit chips using PLL at wafer level
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United States of America Patent
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May 12, 2015
Grant Date -
Oct 24, 2013
app pub date -
Sep 6, 2012
filing date -
Apr 23, 2012
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Abstract
In integrated circuit chips that are used for RFID, a method of calibrating an operation frequency that is generated in an operation frequency generator and a semiconductor wafer including a calibration circuit are provided. The method of calibrating an operation frequency of integrated circuit chips includes: supplying DC power to the integrated circuit chips; selecting an integrated circuit chip to perform calibration of an operation frequency; receiving an operation frequency that is generated in the selected integrated circuit chip; calculating a difference between a phase of the operation frequency and a phase of a calibration target frequency; generating a frequency calibration value of the operation frequency using the phase difference; transmitting a control signal including the frequency calibration value to the integrated circuit chip; and releasing a selection of the integrated circuit chip in which calibration of the operation frequency is complete.
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