Display drive with permutation and superposition gray-level control
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United States of America Patent
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Apr 28, 2015
Grant Date -
Nov 15, 2012
app pub date -
Dec 21, 2010
filing date -
Dec 22, 2009
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Abstract
A display driver circuitry with permutation and superposition gray-level control comprises a gray-level controller. The controller may comprise a permutation and superposition adder configured to divide N-bit gray-level data G into M most significant bits, serving as a superposition reference GH, and (N−M) least significant bits, serving as a superposition increment GL, and to superpose superposition values Xi onto GH to derive pieces of scan data Gi for S scan operations; an overflow bit setting unit configured to set an overflow bit F; and an output unit configured to output the scan data Gi. A display driven this way has an improved refreshing frequency with the same gray-level reproduction ability as PWM-based schemes. Further, the duration of each scan operation, or scan period, is constant, resulting in convenience in software implementations. Furthermore, the pulse width representative of the gray-level value is determined by superposition of the scan operations.
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