Amplifier circuit with offset control
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United States of America Patent
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Feb 17, 2015
Grant Date -
May 23, 2013
app pub date -
Nov 14, 2012
filing date -
Nov 18, 2011
priority date (Note) -
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Abstract
Methods and apparatus for Class-D amplifier circuits with D.C. offset control/correction. A Class-D amplifier is described having an output stage, such as a full H-bridge or half bridge, with a plurality of switches operable to provide a plurality of output states comprising at least a positive output state and a negative output state. Control circuitry is configured to receive a first signal based on the input signal and produce a digital control signal, which is used to determine the switch state of the output stage. A digital integrator is configured to receive a feedback signal indicative of the output state of the output stage and to sample the feedback signal at a sample rate and produce an integrated output signal (INT, IVC) indicating the difference in number of instances of the positive output state and the negative output state. Correction circuitry subtracts the integrated output signal from the input signal to produce a D.C. offset corrected signal.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
CIRRUS LOGIC INC | 800 W 6TH STREET AUSTIN TX 78701 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Lesso, John Paul | Edinburgh, GB | 208 | 2319 |
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