Solder flow impeding feature on a lead frame
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United States of America Patent
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Apr 28, 2015
Grant Date -
Jan 15, 2015
app pub date -
Oct 1, 2014
filing date -
Jun 29, 2012
priority date (Note) -
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status (Latency Note)
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Abstract
One embodiment is directed towards a packaged chip including a lead frame. At least one chip is mounted on the lead frame. At least one edge the lead frame has a solder flow impeding feature located thereon. The solder flow impeding feature includes an integral portion of the lead frame that extends in a first projection outward at an edge of the lead frame and parallel to an external surface of the lead frame. An internal surface of the first projection is aligned with an internal surface of the main portion of the lead frame. The solder flow impeding feature also includes a second projection that extends from an external side of the first projection in a direction generally perpendicular to the first projection.
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