Clock tree generation and routing
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United States of America Patent
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Feb 24, 2015
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N/A
app pub date -
Mar 14, 2013
filing date -
Jun 3, 2012
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Abstract
A technique generates small scale clock trees using a spine-based architecture (using spine routing) while also using clustered placement. Techniques are used to control clock sink cluster contents in order to minimize clock skew, minimize clock buffer count, and minimize use of routing resources. This approach also provides the user with ample structure and control to customize small efficient clock trees, and can also reduce clock power consumption.
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