Optimizing power usage by factoring processor architectural events to PMU

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United States of America Patent

PATENT NO 8966299
APP PUB NO 20140164799A1
SERIAL NO

14182385

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Abstract

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A method and apparatus to monitor architecture events is disclosed. The architecture events are linked together via a push bus mechanism with each architectural event having a designated time slot. There is at least one branch of the push bus in each core. Each branch of the push bus may monitor one core with all the architectural events. All the data collected from the events by the push bus is then sent to a power control unit.

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Patent Owner(s)

Patent OwnerAddress
TAHOE RESEARCH LTDBLANCHARDSTOWN CORPORATE PARK 2 PLAZA 255 SUITE 2A DUBLIN D15 YH6H

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liu, Yen-Cheng Portland, US 106 1199
Or, P Keong Portland, US 11 88
Sistla, Krishnakanth Beaverton, US 38 596
Srinivasa, Ganapati Portland, US 30 366

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