Semiconductor chip with seal ring and sacrificial corner pattern
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 24, 2015
Grant Date -
Sep 8, 2011
app pub date -
May 20, 2011
filing date -
Sep 10, 2004
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor device including a low dielectric constant film of which the relative dielectric constant is less than 3.5, is provided with one or more seal rings that are moisture blocking walls forming a closed loop in a plan view, and where at least one of the seal rings includes a seal ring protrusion portion in inward protruding form in the vicinity of a chip corner.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully