Semiconductor device and method of forming junction enhanced trench power MOSFET having gate structure embedded within trench
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United States of America Patent
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Feb 24, 2015
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N/A
app pub date -
May 23, 2012
filing date -
May 23, 2012
priority date (Note) -
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Abstract
A semiconductor device has a substrate and trench formed partially through the substrate. A drain region is formed in the substrate as a second surface of the substrate. An epitaxial region is formed in the substrate over the drain region. A vertical drift region is formed along a sidewall of the trench. An insulating material is deposited within the trench. A channel region is formed along the sidewall of the trench above the insulating material. The channel region is separated from the insulating material. A gate structure is formed within the trench adjacent to the channel region. The gate structure includes an insulating layer formed along the sidewall of the trench adjacent to the channel region and polysilicon layer formed within the trench over the insulating layer. A source region is formed in a first surface of the substrate contacting the channel region.
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