Method for forming semiconductor device structure and semiconductor device

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United States of America Patent

PATENT NO 8941092
APP PUB NO 20120168818A1
SERIAL NO

13412296

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Abstract

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Disclosed are a method which improves the performance of a semiconductor element, and a semiconductor element with improved performance. The method for forming a semiconductor element structure includes a heterojunction forming step in which a heterojunction is formed between a strained semiconductor layer (21) in which a strained state is maintained, and relaxed semiconductor layers (23, 25). The heterojunction is formed by performing ion implantation from the surface of a substrate (50) which has a strained semiconductor layer (20) partially covered with a covering layer (30) on an insulating oxide film (40), and altering the strained semiconductor layer (20) where there is no shielding from the covering layer (30) to relaxed semiconductor layers (23, 25) by relaxing the strained state of the strained semiconductor layer (20), while maintaining the strained state of the strained semiconductor layer (21) where there is shielding from the covering layer (30).

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Patent Owner(s)

Patent OwnerAddress
KANAGAWA UNIVERSITY3-27-1 ROKKAKUBASHI KANAGAWA-KU YOKOHAMA-SHI KANAGAWA 2218686

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mizuno, Tomohisa Kanagawa, JP 23 1413

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