Circuits and methods for one-wire communication bus of using pulse-edge for clock and pulse-duty-cycle for data

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United States of America Patent

PATENT NO 8929467
SERIAL NO

14153148

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Abstract

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A one-wire communication bus for transferring a sequence of digital data from a transmitter to a receiver includes (a) an ECDD signal modulation circuit to create an electrical pulse train wherein each pulse's edge is used as clock signal and each pulse's duty cycle is used to represent digital value of zero and one; (b) an ECDD signal demodulation circuit to receive the ECDD pulse train using a group of sampling cells and to decode the sampled results using a majority voting circuit; (c) an electrical connection between a transmitter wherein the ECDD signal modulation circuit resides and a receiver wherein the ECDD signal demodulation circuit resides. Said ECDD signal is sent from the transmitter to the receiver through the electrical connection. Methods of creating the ECDD pulse train in the transmitter and decoding the ECDD pulse train in the receiver are also disclosed.

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Patent Owner(s)

Patent OwnerAddress
XIU LIMINGPLANO TX

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  • 2014 Application Filing Year
  • H04L Class
  • 29135 Applications Filed
  • 23333 Patents Issued To-Date
  • 80.09 % Issued To-Date
Click to zoom InYear of Issuance% of Matters IssuedCumulative IssuancesYearly Issuances201420152016201720182019202020212022202320240255075100

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Inventor Name Address # of filed Patents Total Citations
Xiu, Liming Plano, US 71 565

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