System and method for manipulating security of integrated circuit layout
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United States of America Patent
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Dec 9, 2014
Grant Date -
Nov 7, 2013
app pub date -
May 1, 2012
filing date -
May 1, 2012
priority date (Note) -
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Abstract
A method for manipulating security of an integrated circuit layout, comprising: rendering a PCell that is created by an original user for a successive user; providing an open access to the PCell; providing a PCell evaluator to execute evaluating steps of: getting license information from the PCell, and checking the PCell license information; and generating a layout of a sub-master by instantiating a super-master of the PCell if the PCell license information is valid, or leave the sub-master empty in a PCell view if the PCell license information is invalid.
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