NoC-based adaptive error correction apparatus
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United States of America Patent
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Nov 25, 2014
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app pub date -
Dec 28, 2012
filing date -
Apr 12, 2012
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Abstract
An NoC-based error correction apparatus capable of supporting a network interface that transmits a flit between Tx and Rx IP-elements includes: an encoder configured to receive a k-bit flit from the Tx IP-element and encodes the k-bit flit into n-bit data; and a decoder configured to receive the n-bit data, decode the n-bit data into the k-bit flit, and output the k-bit flit, the decoder having an error correction circuit for correcting an error in the n-bit data, wherein a t-bit adaptive error correction code having a variable error correction capability depending on the number of bits (n) of the received data is applied to the error correction circuit, the error correction capability is proportional to the number of bits (n) of the received data, and the t-bit error correction code has the number of bits proportional to the number of bits (n) of the received data.
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