Phase shift phase locked loop
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 21, 2014
Issued Date -
N/A
app pub date -
Feb 27, 2009
filing date -
Feb 27, 2009
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A phase shift phase locked loop (PSPLL) are described. The phase shift PLL includes a PLL and a phase adjusting circuit coupled to the inputs of the PLL. The phase adjusting circuit has a first input, a first output, a second input, a third input, and a second output. The first output and the second output are coupled to a first input and a second input of the PLL, respectively. The second input of the phase adjusting circuit receives a feedback signal and the third input of the phase adjusting circuit receives a control signal. The phase adjusting circuit receives a reference signal and sends a first output signal and a second output signal based on the reference signal to the PLL to adjust a phase of an output signal of the PLL in an increment less than a time period of the output signal of the PLL.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully